When scalping (removing the heat of the distribution cover), the certified eight eight -core CCD crystals and one crystal iD were found.

After opening, Tom Wassick went further, scraping TIM (the material of the thermal interface, often this "liquid metal") from the place where it leaked. However, there were no borders in the design and there were no individual silicon gaskets in the layout.

Further work of Tom Wassick implied that the Milan-X chip relied on the “monolithic part in which the active SRAM is built-in, which means that part of the SRAM (Kesh-Mapamy) of this only upper crystal was apparently located in the middle and was surrounded "Empty" areas of silicon. This is very different from the structure that AMD outlined in the previous data provided by the company:

After further studying the data on the cross section, Tom Wassick found that the design includes five silicon elements instead of four shown in most AMD diagrams.

First, an additional L3-Kesh and two leveling silicon plates are installed on the base eight-core crystal Zen 3 on top, and then all this assembly is additionally closed with another silicon plate, which hides all components under it.

If in more detail, the blue crystal (CCD) has a SRAM crystal (red block), located on top. On the sides of the SRAM there is Silicon gasket (green), each of which has another layer of supporting silicon (gray) from above. The blue crystal is associated with the printed circuit board on the chip housing, and AMD applies an indoor solder to the upper part of the support of the support facing up. Then it is connected to the built -in heat distributor (IHS).

AMD showed the true scheme of processors with 3D V-Cache technology only once-at the ISSCC industry conference:

An additional plate covering SRAM and silicon gaskets is needed to reduce the likelihood of processor damage.