Fresh leakage from Geebench shows that the unwipped AMD processor with the OPN core of 100-000000479-13 was recently tested on the checkpoint called Quartz. This OPN code is associated with a series of AMD EPYC Genoa, an engineering model based on silicon A0, if more accurate.

This is a 32-nuclear and 64-flow processor with a basic clock frequency of 1.2 GHz. Given the early condition of this sample, this watch will undoubtedly be higher on the serial instance.

The Genoa EPYC CPU has 1 MB of L2 Cache. It is twice as bigger than in Naples, Rome or Milan. Cache L3 has not changed since Milan and is 32 MB on the chiplet (this sample has CCX, each of which has 8 cores). However, since Genoa will offer up to 96 cores, the maximum size of the L3 cache will still be higher than that of its predecessors (with the exception of Milan-X with 3D V-Cache).

ExecutableFix confirmed that this particular sample is part of the Zen4 Genoa series in January of this year. According to the source, a 96-nuclear sample is also tested, but we have not yet seen it in Geekbench.

The AMD EPYC 7004 Genoa series will officially have up to 96 nuclei performed on 5 nm process. This will be the first AMD server platform that supports the DDR5 memory technology, as well as the PCIE GEN5 interface. According to AMD, he is currently preparing for launch in 2022. Currently, it provides customers with samples.